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Apr 25, 2022 - C++
vivado-hls
Here are 69 public repositories matching this topic...
Dionysios Diamantopoulos Web Edition
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Aug 3, 2021 - JavaScript
Course Project for CS577, Using keras2c to make machine learning model vivado synthesizable
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May 10, 2024 - Ada
Implementation of a (soft) coprocessor for the computation of a 16 bit LFSR.
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Sep 17, 2021 - VHDL
Course taken by Dr Chandan Karfa of Dept. of CSE, IIT Guwahati.
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Mar 23, 2023 - C++
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Oct 9, 2017 - C++
An accelerated implementation of the kNN algorithm on the Kria KV260 FPGA
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Aug 2, 2024 - C++
Implementation in VHDL of an HW component capable of recalibrating the contrast of an image stored in an external memory, using a histogram equalization algorithm.
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Aug 29, 2021 - VHDL
Multi-Clock Dataflow Automation and Throughput Optimization in High-Level Synthesis
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Apr 11, 2024
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Apr 11, 2021 - C++
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Nonuniform Partitioning of Data Reuse Buffers on FPGAs
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Sep 13, 2022 - C++
Using Vivado HLS to create floating point IP, used to accelerate a Zynq system. Multiple engines are instantiated.
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Jan 21, 2018 - VHDL
High level synthesis projects and practices
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Apr 13, 2021 - C++
A simple DNN for handwritten numbers recognition. Written in C++, and optimized using Vivado HLS.
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Nov 21, 2019 - C++
Vitis (Vivado) HLS Examples
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Sep 1, 2024 - C++
High Level synthesis of data transfer in Vivado, Vivado HLS
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May 16, 2022 - C++
A HLS IP to convert 24 bit RGB data to Grayscale data on AXI interface
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Jul 22, 2020 - C++
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