Debugger: Clear exceptions before resuming interrupted threads

Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>

conformance_tests/tools/debug/src/test_debug.cpp

@@ -1250,7 +1250,7 @@ void zetDebugReadWriteRegistersTest::run_read_write_registers_test(
 
     LOG_INFO << "[Debugger] Stopping all device threads";
     // give time to app to launch the kernel
-    std::this_thread::sleep_for(std::chrono::seconds(6));
+    std::this_thread::sleep_for(std::chrono::seconds(60));
 
     lzt::debug_interrupt(debugSession, device_threads);
 
@@ -1335,6 +1335,7 @@ void zetDebugReadWriteRegistersTest::run_read_write_registers_test(
         lzt::free_memory(buffer_copy);
         regSetNumber++;
       }
+      lzt::clear_exceptions(device, debugSession, device_threads);
     }
 
     lzt::debug_write_memory(debugSession, device_threads, memorySpaceDesc, 1,
@@ -1399,7 +1400,7 @@ void zetDebugThreadControlTest::SetUpThreadControl(ze_device_handle_t &device,
 
   LOG_INFO << "[Debugger] Interrupting all threads";
   // give time to app to launch the kernel
-  std::this_thread::sleep_for(std::chrono::seconds(6));
+  std::this_thread::sleep_for(std::chrono::seconds(60));
 
   lzt::debug_interrupt(debugSession, thread);
   stopped_threads = {};

conformance_tests/tools/debug/src/test_debug_utils.cpp

@@ -522,6 +522,7 @@ get_stopped_threads(const zet_debug_session_handle_t &debug_session,
 
           if (read_register(debug_session, device_thread, regset_properties[2],
                             false)) {
+            lzt::clear_exceptions(device, debug_session, device_thread);
             threads.push_back(device_thread);
           }
         }
@@ -533,7 +534,7 @@ get_stopped_threads(const zet_debug_session_handle_t &debug_session,
   return threads;
 }
 
-// wait for stopped thread event and retunrn stopped threads
+// wait for stopped thread event and return stopped threads
 bool find_stopped_threads(const zet_debug_session_handle_t &debugSession,
                           const ze_device_handle_t &device,
                           ze_device_thread_t thread, bool checkEvent,
@@ -679,10 +680,11 @@ void wait_for_events_interrupt_and_resume(
   LOG_INFO << "[Debugger] Sending interrupt";
   lzt::debug_interrupt(debugSession, device_thread);
 
-  lzt::debug_read_event(debugSession, debug_event, eventsTimeoutMS, false);
-  LOG_INFO << "[Debugger] received event: "
-           << lzt::debuggerEventTypeString[debug_event.type];
-  ASSERT_EQ(debug_event.type, ZET_DEBUG_EVENT_TYPE_THREAD_STOPPED);
+  std::vector<ze_device_thread_t> stopped_threads;
+  if (!find_stopped_threads(debugSession, device, device_thread, true,
+                            stopped_threads)) {
+    FAIL() << "[Debugger] Did not find stopped threads";
+  }
 
   // write to kernel buffer to signal to application to end
   zet_debug_memory_space_desc_t memory_space_desc = {};
@@ -758,7 +760,7 @@ void zetDebugMemAccessTest::run_read_write_module_and_memory_test(
 
     LOG_INFO << "[Debugger] Interrupting all threads";
     // give time to app to launch the kernel
-    std::this_thread::sleep_for(std::chrono::seconds(6));
+    std::this_thread::sleep_for(std::chrono::seconds(60));
 
     lzt::debug_interrupt(debugSession, thread);
     std::vector<ze_device_thread_t> stopped_threads;

utils/test_harness/include/test_harness/zet_intel_gpu_debug.h

@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2021-2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#ifndef _ZET_INTEL_GPU_DEBUG_H
+#define _ZET_INTEL_GPU_DEBUG_H
+#if defined(__cplusplus)
+#pragma once
+#endif
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#ifndef ZET_INTEL_GPU_DEBUG_MAJOR
+#define ZET_INTEL_GPU_DEBUG_MAJOR 1
+#endif // !ZET_INTEL_GPU_DEBUG_MAJOR
+
+#ifndef ZET_INTEL_GPU_DEBUG_MINOR
+#define ZET_INTEL_GPU_DEBUG_MINOR 1
+#endif //! ZET_INTEL_GPU_DEBUG_MINOR
+
+#if ZET_INTEL_GPU_DEBUG_MAJOR == 1
+///////////////////////////////////////////////////////////////////////////////
+/// @brief Supported device-specific register set types.
+typedef enum _zet_debug_regset_type_intel_gpu_t {
+#if ZET_INTEL_GPU_DEBUG_MINOR >= 0
+    ZET_DEBUG_REGSET_TYPE_INVALID_INTEL_GPU = 0, ///< An invalid register set
+    ZET_DEBUG_REGSET_TYPE_GRF_INTEL_GPU = 1,     ///< The general purpose register set
+    ZET_DEBUG_REGSET_TYPE_ADDR_INTEL_GPU = 2,    ///< The address register set
+    ZET_DEBUG_REGSET_TYPE_FLAG_INTEL_GPU = 3,    ///< The flag register set
+    ZET_DEBUG_REGSET_TYPE_CE_INTEL_GPU = 4,      ///< The channel enable register set
+    ZET_DEBUG_REGSET_TYPE_SR_INTEL_GPU = 5,      ///< The status register set
+    ZET_DEBUG_REGSET_TYPE_CR_INTEL_GPU = 6,      ///< The control register set
+    ZET_DEBUG_REGSET_TYPE_TDR_INTEL_GPU = 7,     ///< The thread dependency register set
+    ZET_DEBUG_REGSET_TYPE_ACC_INTEL_GPU = 8,     ///< The accumulator register set
+    ZET_DEBUG_REGSET_TYPE_MME_INTEL_GPU = 9,     ///< The mme register set
+    ZET_DEBUG_REGSET_TYPE_SP_INTEL_GPU = 10,     ///< The stack pointer register set
+    ZET_DEBUG_REGSET_TYPE_SBA_INTEL_GPU = 11,    ///< The state base address register set
+    ZET_DEBUG_REGSET_TYPE_DBG_INTEL_GPU = 12,    ///< The debug register set
+    ZET_DEBUG_REGSET_TYPE_FC_INTEL_GPU = 13,     ///< The flow control register set
+#if ZET_INTEL_GPU_DEBUG_MINOR >= 1
+    ZET_DEBUG_REGSET_TYPE_MSG_INTEL_GPU = 14,            ///< The msg register set
+    ZET_DEBUG_REGSET_TYPE_MODE_FLAGS_INTEL_GPU = 15,     ///< System Routine mode flags register set
+    ZET_DEBUG_REGSET_TYPE_DEBUG_SCRATCH_INTEL_GPU = 16,  ///< Debug Scratch register set
+    ZET_DEBUG_REGSET_TYPE_THREAD_SCRATCH_INTEL_GPU = 17, ///< Thread Scratch register set
+    ZET_DEBUG_REGSET_TYPE_SCALAR_INTEL_GPU = 18,         ///< The scalar register set
+#endif                                                   // ZET_INTEL_GPU_DEBUG_MINOR >= 1
+    ZET_DEBUG_REGSET_TYPE_FORCE_UINT32 = 0x7fffffff
+#endif // ZET_INTEL_GPU_DEBUG_MINOR >= 0
+} zet_debug_regset_type_intel_gpu_t;
+
+#if ZET_INTEL_GPU_DEBUG_MINOR >= 1
+////////////////////////////////////////////////////////////////////////////////
+/// @brief ZET_DEBUG_REGSET_TYPE_MODE_FLAGS_INTEL_GPU flag values
+typedef enum _zet_debug_mode_flags_intel_gpu_t {
+    ZET_DEBUG_MODE_FLAG_HEAPLESS = 1 ///< Bit set indicates heapless mode
+} zet_debug_mode_flags_intel_gpu_t;
+
+////////////////////////////////////////////////////////////////////////////////
+/// @brief ZET_DEBUG_REGSET_TYPE_DEBUG_SCRATCH_INTEL_GPU register layout
+typedef enum _zet_debug_debug_scratch_intel_gpu_t {
+    ZET_DEBUG_DEBUG_SCRATCH_ADDRESS = 0, ///< VA of scratch area for debugger code injection.
+                                         ///< VA is in default address space of device
+    ZET_DEBUG_DEBUG_SCRATCH_SIZE = 1,    ///< Size of scratch area in bytes
+} zet_debug_debug_scratch_intel_gpu_t;
+#endif // ZET_INTEL_GPU_DEBUG_MINOR >= 1
+////////////////////////////////////////////////////////////////////////////////
+/// @brief SBA register set layout
+typedef enum _zet_debug_sba_intel_gpu_t {
+    ZET_DEBUG_SBA_GENERAL_STATE_INTEL_GPU = 0,    ///< GeneralStateBaseAddress
+    ZET_DEBUG_SBA_SURFACE_STATE_INTEL_GPU = 1,    ///< SurfaceStateBaseAddress
+    ZET_DEBUG_SBA_DYNAMIC_STATE_INTEL_GPU = 2,    ///< DynamicStateBaseAddress
+    ZET_DEBUG_SBA_INDIRECT_OBJECT_INTEL_GPU = 3,  ///< IndirectObjectBaseAddress
+    ZET_DEBUG_SBA_INSTRUCTION_INTEL_GPU = 4,      ///< InstructionBaseAddress
+    ZET_DEBUG_SBA_BINDLESS_SURFACE_INTEL_GPU = 5, ///< BindlessSurfaceStateBaseAddress
+    ZET_DEBUG_SBA_BINDLESS_SAMPLER_INTEL_GPU = 6, ///< BindlessSamplerStateBaseAddress
+    ZET_DEBUG_SBA_BINDING_TABLE_INTEL_GPU = 7,    ///< BindingTableStateBaseAddress
+    ZET_DEBUG_SBA_SCRATCH_SPACE_INTEL_GPU = 8,    ///< ScratchSpaceBaseAddress
+    ZET_DEBUG_SBA_COUNT_INTEL_GPU = 9             ///< Number of registers in SBA regster set
+} zet_debug_sba_intel_gpu_t;
+#endif // ZET_INTEL_GPU_DEBUG_MAJOR == 1
+
+#if defined(__cplusplus)
+} // extern "C"
+#endif
+
+#endif // _ZET_INTEL_GPU_DEBUG_H

utils/test_harness/tools/include/test_harness_debug.hpp

@@ -42,6 +42,10 @@ void debug_interrupt(const zet_debug_session_handle_t &debug_session,
 void debug_resume(const zet_debug_session_handle_t &debug_session,
                   const ze_device_thread_t &device_thread);
 
+void clear_exceptions(const ze_device_handle_t &device,
+                    const zet_debug_session_handle_t &debug_session,
+                  const ze_device_thread_t &device_thread);
+
 void debug_read_memory(const zet_debug_session_handle_t &debug_session,
                        const ze_device_thread_t &device_thread,
                        const zet_debug_memory_space_desc_t &desc, size_t size,

utils/test_harness/tools/src/test_harness_debug.cpp

@@ -11,6 +11,7 @@
 #include "test_harness/test_harness.hpp"
 #include <level_zero/ze_api.h>
 #include "utils/utils.hpp"
+#include "test_harness/zet_intel_gpu_debug.h"
 
 namespace lzt = level_zero_tests;
 
@@ -141,6 +142,70 @@ void debug_resume(const zet_debug_session_handle_t &debug_session,
   EXPECT_EQ(ZE_RESULT_SUCCESS, zetDebugResume(debug_session, device_thread));
 }
 
+void printRegSetProperties(zet_debug_regset_properties_t regSet) {
+
+  LOG_DEBUG << "[Debugger] Reg Set Type: " << regSet.type;
+  LOG_DEBUG << "[Debugger] Reg Set Version: " << regSet.version;
+  LOG_DEBUG << "[Debugger] Reg Set GeneralFlags: " << regSet.generalFlags;
+  LOG_DEBUG << "[Debugger] Reg Set deviceFlags: " << regSet.deviceFlags;
+  LOG_DEBUG << "[Debugger] Reg Set count: " << regSet.count;
+  LOG_DEBUG << "[Debugger] Reg Set bit size: " << regSet.bitSize;
+  LOG_DEBUG << "[Debugger] Reg Set byte size: " << regSet.byteSize;
+  return;
+}
+
+bool get_register_set_props(ze_device_handle_t device,
+                            zet_debug_regset_type_intel_gpu_t type,
+                            zet_debug_regset_properties_t &reg) {
+  uint32_t nRegSets = 0;
+  zetDebugGetRegisterSetProperties(device, &nRegSets, nullptr);
+  zet_debug_regset_properties_t *pRegSets =
+      new zet_debug_regset_properties_t[nRegSets];
+  for (int i = 0; i < nRegSets; i++) {
+    pRegSets[i] = {ZET_STRUCTURE_TYPE_DEBUG_REGSET_PROPERTIES, nullptr};
+  }
+  zetDebugGetRegisterSetProperties(device, &nRegSets, pRegSets);
+
+  bool found = false;
+  for (int i = 0; i < nRegSets; i++) {
+    if (pRegSets[i].type == type) {
+      printRegSetProperties(pRegSets[i]);
+      reg = pRegSets[i];
+      found = true;
+      break;
+    }
+  }
+
+  delete[] pRegSets;
+  return found;
+}
+
+void clear_exceptions(const ze_device_handle_t &device,
+                    const zet_debug_session_handle_t &debug_session,
+                  const ze_device_thread_t &device_thread) {
+  size_t reg_size_in_bytes = 0;
+
+  zet_debug_regset_properties_t cr_reg_prop;
+  ASSERT_TRUE(get_register_set_props(device, ZET_DEBUG_REGSET_TYPE_CR_INTEL_GPU,
+                                     cr_reg_prop));
+
+  reg_size_in_bytes = cr_reg_prop.count * cr_reg_prop.byteSize;
+  uint8_t *cr_values = new uint8_t[reg_size_in_bytes];
+  uint32_t *uint32_values = (uint32_t *)cr_values;
+
+  ASSERT_EQ(zetDebugReadRegisters(debug_session, device_thread,
+                                  ZET_DEBUG_REGSET_TYPE_CR_INTEL_GPU, 0,
+                                  cr_reg_prop.count, cr_values),
+            ZE_RESULT_SUCCESS);
+
+  uint32_values[1] &=
+      ~((1 << 26) | (1 << 30));
+  ASSERT_EQ(zetDebugWriteRegisters(debug_session, device_thread,
+                                   ZET_DEBUG_REGSET_TYPE_CR_INTEL_GPU, 0,
+                                   cr_reg_prop.count, cr_values),
+            ZE_RESULT_SUCCESS);
+}
+
 void debug_read_memory(const zet_debug_session_handle_t &debug_session,
                        const ze_device_thread_t &device_thread,
                        const zet_debug_memory_space_desc_t &desc, size_t size,