Personal repository for COL216 assignments - pardon mistakes!
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Assignment 0 - To implement booth multiplier (variable latency multiplier) and compare efficiency and performance with fixed latency multiplier.
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Assignment 1 - Implement simple RISC-V programs in RARS. Comparison of performance between recursion, tail recursion and loops in assembly language.
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Assignment 2 - Implement the RISC-V single cycle processor, building from a ripple carry adder to ALU to Register File to the main Decode Unit and Memory of the processor.
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Assignment 3 - Make a cache simulator for L1 cache with two possible replacement policies - LRU and FIFO. Identify the best cache combination. Figure out cache parameters from a given code performance.