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Breaking Ankles
Pinned Loading
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Single-Cycle-RV32I
Single-Cycle-RV32I PublicSingle Cycle CPU using the RV32I Base Instruction set
Verilog 8
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Compiler-RV32I
Compiler-RV32I PublicRudimentary compiler for bare bones RV32I on my custom Single Cycle CPU
Python 1
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RISC-V-Programs
RISC-V-Programs PublicRISC-V Programs is a collection of programs writen in C and Assembly for various RISC-V implementations.
Makefile 1
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verilog-modules
verilog-modules PublicArchive of all the different general purpose verilog modules that I build
Verilog 1
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