This is a repository of my implementation of basic concepts in computer architecture through in-class coursework.
The first branch shows pseudo-code implementation of comparing two strings in MIPS assembly language.
The second branch shows an implementation of a cycle-accurate instruction level simulator which supports a subset of the MIPS Instruction Set Architecture.
The third branch builds on the second branch to create a pipe-lined MIPS datapath. It models the behaviour of each instruction during pipleined execution.
The fourth Branch shows a two stage memory hierarchy which contains a cache and main memory. The code implements direct-mapped, two-way associative and fully associative cache designs with LRU policy for replacing cache blocks.