quartus2
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This space ship game project, where the spaceship is positioned at the center and objects coming from different directions can be hit using FPGA buttons, has been implemented with Verilog coding in quartus environment for Altera System-on-Chip (SoC) FPGA and VGA for display.
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Aug 28, 2024 - Verilog
A digital design implementation of a FIFO memory circuit using VHDL simulated in Quartus.
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Jun 11, 2024 - VHDL
Repositorio de proyectos hechos en el Quartus II para el FPGA Cyclone II
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Jun 10, 2024 - C
Programas Basicos en Lenguaje VHDL de Diseño Logico y Diseño de Circuitos Digitales para Uso y simulacion con QuartusII y los FPGA Cyclone III de Altera (Compilados y compatibles con la FPGA EP3C16F484C6N) Para Practica en la Licenciatura de Ingenieria Electrica Electronica e Ingenieria en Computación Bajo Licencia MIT
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Jun 3, 2024 - VHDL
The goal of ECE 385 course is to teach students to design, build, and test/debug a digital system, which can be a 16-bit microprocessor, a dedicated logic core, or a system-on-a-chip (SoC) platform
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May 28, 2024 - Verilog
A dump for my VHDL projects, because I want to have a better understanding of Verilog and also Logic circuits.
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May 24, 2024 - Verilog
Ejemplos de codigo con implementación en hardware para la tarjeta Cyclone IV lenguaje VHDL
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Apr 15, 2024 - VHDL
Computer Architecture Lab - Assignments - Fall 2023
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Feb 1, 2024 - SystemVerilog
Subida del fichero TCL asociado al pineado de la placa CYC1000, Con sus múltiples variantes recogidas en un fichero de texto.
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Dec 11, 2023
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Jul 1, 2023 - VHDL
Integrated and programmed a VGA Interface using the Altera DE1 to output in synchronization with a custom programmed finite-state machine.
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Feb 7, 2023 - VHDL
A 16 bit processor, following the RISC architecture. Made with Quartus and VHDL.
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Jun 22, 2022 - HTML
Logic Design.
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Apr 16, 2022 - VHDL
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